IR2151
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage param-
eters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured
under board mounted and still air conditions.
Symbol
V B
V S
V HO
V LO
V RT
V CT
I CC
I RT
dV s /dt
Definition
High side floating supply voltage
High side floating supply offset voltage
High side floating output voltage
Low side output voltage
R T voltage
C T voltage
Supply current (note 1)
R T output current
Allowable offset supply voltage transient
Min.
-0.3
V B - 25
V S - 0.3
-0.3
-0.3
-0.3
-5
Max.
625
V B + 0.3
V B + 0.3
V CC + 0.3
V CC + 0.3
V CC + 0.3
25
5
50
Units
V
mA
V/ns
P D
Package power dissipation @ T A ≤ +25°C
(8 lead DIP)
1.0
W
(8 lead SOIC)
0.625
R θ JA
Thermal resistance, junction to ambient
(8 lead DIP)
125
°C/W
(8 lead SOIC)
200
T J
Junction temperature
150
T S
T L
Storage temperature
Lead temperature (soldering, 10 seconds)
-55
150
300
°C
Recommended Operating Conditions
The input/output logic timing diagram is shown in figure 1. For proper operation the device should be used within the
recommended conditions. The V S offset rating is tested with all supplies biased at 15V differential.
Symbol
V B
V S
V HO
V LO
I CC
T A
Definition
High side sloating supply absolute voltage
High side floating supply offset voltage
High side floating output voltage
Low side output voltage
Supply current (note 1)
Ambient temperature
Min.
V S + 10
V S
0
-40
Max.
V S + 20
600
V B
V CC
5
125
Units
V
mA
°C
Note 1:
Because of the IR2151’s application specificity toward off-line supply systems, this IC contains a zener clamp
structure between the chip V CC and COM which has a nominal breakdown voltage of 15.6V. Therefore, the IC
supply voltage is normally derived by forcing current into the supply lead (typically by means of a high value
resistor connected between the chip V CC and the rectified line voltage and a local decoupling capacitor from
V CC to COM) and allowing the internal zener clamp circuit to determine the nominal supply voltage. There-
fore, this circuit should not be driven by a DC, low impedance power source of greater than V CLAMP .
2
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